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https://github.com/guilhermewerner/machine
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Update operations
This commit is contained in:
Werner
BIN
Examples/Bytecode.bin
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BIN
Examples/Bytecode.bin
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@ -5,7 +5,7 @@ use std::fs;
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fn main() {
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let mut vm = Machine::New([0, 0, 0, 0]);
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let code = fs::read("Examples/Simple.bin").unwrap();
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let code = fs::read("Examples/Bytecode.bin").unwrap();
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vm.LoadProgram(&code);
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vm.Execute();
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}
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@ -2,36 +2,36 @@ use crate::Types::*;
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use std::mem;
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pub struct Heap {
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buffer: Vec<Byte>,
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inner: Vec<Byte>,
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lenght: usize,
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}
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impl Heap {
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pub fn New(size: usize) -> Self {
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Self {
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buffer: Vec::with_capacity(size),
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inner: Vec::with_capacity(size),
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lenght: size,
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}
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}
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pub fn IsEmpty(&self) -> bool {
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self.buffer.is_empty()
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self.inner.is_empty()
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}
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pub fn Flush(&mut self) {
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self.buffer.clear();
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self.inner.clear();
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}
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pub fn ReadByte(&mut self, addr: u32) -> Byte {
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let index = addr as usize;
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*self.buffer.get(index).unwrap()
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*self.inner.get(index).unwrap()
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}
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pub fn WriteByte(&mut self, addr: u32, value: Byte) {
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let index = addr as usize;
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if index < self.lenght {
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self.buffer.push(value);
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self.inner.push(value);
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}
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}
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@ -42,7 +42,7 @@ impl Heap {
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let mut buffer = [0; BYTES];
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for i in 0..BYTES {
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buffer[i] = *self.buffer.get(index).unwrap_or(&0);
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buffer[i] = *self.inner.get(index).unwrap_or(&0);
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index += 1;
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}
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@ -53,7 +53,7 @@ impl Heap {
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let index = addr as usize;
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if index < self.lenght {
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self.buffer.extend(value);
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self.inner.extend(value);
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}
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}
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@ -64,7 +64,7 @@ impl Heap {
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let mut buffer = [0; BYTES];
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for i in 0..BYTES {
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buffer[i] = *self.buffer.get(index).unwrap_or(&0);
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buffer[i] = *self.inner.get(index).unwrap_or(&0);
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index += 1;
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}
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@ -75,7 +75,51 @@ impl Heap {
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let index = addr as usize;
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if index < self.lenght {
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self.buffer.extend(value);
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self.inner.extend(value);
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}
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}
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pub fn ReadDWord(&mut self, addr: u32) -> DWord {
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let mut index = addr as usize;
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const BYTES: usize = mem::size_of::<DWord>();
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let mut buffer = [0; BYTES];
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for i in 0..BYTES {
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buffer[i] = *self.inner.get(index).unwrap_or(&0);
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index += 1;
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}
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buffer
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}
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pub fn WriteDWord(&mut self, addr: u32, value: DWord) {
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let index = addr as usize;
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if index < self.lenght {
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self.inner.extend(value);
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}
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}
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pub fn ReadQWord(&mut self, addr: u32) -> QWord {
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let mut index = addr as usize;
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const BYTES: usize = mem::size_of::<QWord>();
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let mut buffer = [0; BYTES];
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for i in 0..BYTES {
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buffer[i] = *self.inner.get(index).unwrap_or(&0);
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index += 1;
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}
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buffer
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}
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pub fn WriteQWord(&mut self, addr: u32, value: QWord) {
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let index = addr as usize;
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if index < self.lenght {
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self.inner.extend(value);
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}
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}
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}
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@ -1,4 +1,3 @@
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use crate::Payload::{ThreeRegisters, TwoRegisters};
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use crate::{Machine, Payload};
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pub fn Nothing(vm: &mut Machine) -> bool {
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@ -50,23 +49,20 @@ pub fn DecrementRegister(vm: &mut Machine) -> bool {
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true
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}
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#[allow(dead_code)]
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pub fn Move(_vm: &mut Machine) -> bool {
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false
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pub fn Neg(vm: &mut Machine) -> bool {
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let payload = Payload::GetTwoRegisters(vm);
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let a = i32::from_be_bytes(vm.registry.Get(payload.1));
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vm.registry.Set(payload.0, (-a).to_be_bytes());
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vm.Walk(3);
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true
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}
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pub fn Add(vm: &mut Machine) -> bool {
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let payload = Payload::GetThreeRegisters(vm);
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_Add(vm, payload)
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}
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pub fn AddAssign(vm: &mut Machine) -> bool {
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let payload = Payload::GetTwoRegisters(vm);
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_Add(vm, (payload.0, payload.0, payload.1))
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}
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#[inline]
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fn _Add(vm: &mut Machine, payload: ThreeRegisters) -> bool {
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let a = u32::from_be_bytes(vm.registry.Get(payload.1));
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let b = u32::from_be_bytes(vm.registry.Get(payload.2));
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@ -78,16 +74,7 @@ fn _Add(vm: &mut Machine, payload: ThreeRegisters) -> bool {
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pub fn Subtract(vm: &mut Machine) -> bool {
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let payload = Payload::GetThreeRegisters(vm);
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_Subtract(vm, payload)
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}
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pub fn SubtractAssign(vm: &mut Machine) -> bool {
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let payload = Payload::GetTwoRegisters(vm);
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_Subtract(vm, (payload.0, payload.0, payload.1))
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}
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#[inline]
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fn _Subtract(vm: &mut Machine, payload: ThreeRegisters) -> bool {
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let a = u32::from_be_bytes(vm.registry.Get(payload.1));
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let b = u32::from_be_bytes(vm.registry.Get(payload.2));
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@ -99,16 +86,7 @@ fn _Subtract(vm: &mut Machine, payload: ThreeRegisters) -> bool {
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pub fn Multiply(vm: &mut Machine) -> bool {
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let payload = Payload::GetThreeRegisters(vm);
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_Multiply(vm, payload)
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}
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pub fn MultiplyAssign(vm: &mut Machine) -> bool {
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let payload = Payload::GetTwoRegisters(vm);
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_Multiply(vm, (payload.0, payload.0, payload.1))
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}
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#[inline]
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fn _Multiply(vm: &mut Machine, payload: ThreeRegisters) -> bool {
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let a = u32::from_be_bytes(vm.registry.Get(payload.1));
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let b = u32::from_be_bytes(vm.registry.Get(payload.2));
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@ -120,16 +98,7 @@ fn _Multiply(vm: &mut Machine, payload: ThreeRegisters) -> bool {
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pub fn Divide(vm: &mut Machine) -> bool {
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let payload = Payload::GetThreeRegisters(vm);
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_Divide(vm, payload)
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}
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pub fn DivideAssign(vm: &mut Machine) -> bool {
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let payload = Payload::GetTwoRegisters(vm);
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_Divide(vm, (payload.0, payload.0, payload.1))
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}
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#[inline]
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fn _Divide(vm: &mut Machine, payload: ThreeRegisters) -> bool {
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let a = u32::from_be_bytes(vm.registry.Get(payload.1));
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let b = u32::from_be_bytes(vm.registry.Get(payload.2));
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@ -141,16 +110,7 @@ fn _Divide(vm: &mut Machine, payload: ThreeRegisters) -> bool {
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pub fn Remainder(vm: &mut Machine) -> bool {
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let payload = Payload::GetThreeRegisters(vm);
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_Remainder(vm, payload)
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}
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pub fn RemainderAssign(vm: &mut Machine) -> bool {
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let payload = Payload::GetTwoRegisters(vm);
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_Remainder(vm, (payload.0, payload.0, payload.1))
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}
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#[inline]
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fn _Remainder(vm: &mut Machine, payload: ThreeRegisters) -> bool {
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let a = u32::from_be_bytes(vm.registry.Get(payload.1));
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let b = u32::from_be_bytes(vm.registry.Get(payload.2));
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@ -160,23 +120,9 @@ fn _Remainder(vm: &mut Machine, payload: ThreeRegisters) -> bool {
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true
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}
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#[allow(dead_code)]
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pub fn Neg(_vm: &mut Machine) -> bool {
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false
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}
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pub fn And(vm: &mut Machine) -> bool {
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let payload = Payload::GetThreeRegisters(vm);
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_And(vm, payload)
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}
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pub fn AndAssign(vm: &mut Machine) -> bool {
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let payload = Payload::GetTwoRegisters(vm);
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_And(vm, (payload.0, payload.0, payload.1))
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}
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#[inline]
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fn _And(vm: &mut Machine, payload: ThreeRegisters) -> bool {
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let a = u32::from_be_bytes(vm.registry.Get(payload.1));
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let b = u32::from_be_bytes(vm.registry.Get(payload.2));
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@ -188,16 +134,7 @@ fn _And(vm: &mut Machine, payload: ThreeRegisters) -> bool {
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pub fn Or(vm: &mut Machine) -> bool {
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let payload = Payload::GetThreeRegisters(vm);
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_Or(vm, payload)
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}
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pub fn OrAssign(vm: &mut Machine) -> bool {
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let payload = Payload::GetTwoRegisters(vm);
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_Or(vm, (payload.0, payload.0, payload.1))
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}
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#[inline]
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fn _Or(vm: &mut Machine, payload: ThreeRegisters) -> bool {
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let a = u32::from_be_bytes(vm.registry.Get(payload.1));
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let b = u32::from_be_bytes(vm.registry.Get(payload.2));
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@ -209,16 +146,7 @@ fn _Or(vm: &mut Machine, payload: ThreeRegisters) -> bool {
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pub fn Xor(vm: &mut Machine) -> bool {
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let payload = Payload::GetThreeRegisters(vm);
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_Xor(vm, payload)
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}
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pub fn XorAssign(vm: &mut Machine) -> bool {
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let payload = Payload::GetTwoRegisters(vm);
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_Xor(vm, (payload.0, payload.0, payload.1))
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}
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#[inline]
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fn _Xor(vm: &mut Machine, payload: ThreeRegisters) -> bool {
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let a = u32::from_be_bytes(vm.registry.Get(payload.1));
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let b = u32::from_be_bytes(vm.registry.Get(payload.2));
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@ -239,18 +167,45 @@ pub fn Not(vm: &mut Machine) -> bool {
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true
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}
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pub fn Nand(vm: &mut Machine) -> bool {
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let payload = Payload::GetThreeRegisters(vm);
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let a = u32::from_be_bytes(vm.registry.Get(payload.1));
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let b = u32::from_be_bytes(vm.registry.Get(payload.2));
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vm.registry.Set(payload.0, (!(a & b)).to_be_bytes());
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vm.Walk(3);
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true
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}
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pub fn Nor(vm: &mut Machine) -> bool {
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let payload = Payload::GetThreeRegisters(vm);
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let a = u32::from_be_bytes(vm.registry.Get(payload.1));
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let b = u32::from_be_bytes(vm.registry.Get(payload.2));
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vm.registry.Set(payload.0, (!(a | b)).to_be_bytes());
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vm.Walk(3);
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true
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}
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pub fn Xnor(vm: &mut Machine) -> bool {
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let payload = Payload::GetThreeRegisters(vm);
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let a = u32::from_be_bytes(vm.registry.Get(payload.1));
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let b = u32::from_be_bytes(vm.registry.Get(payload.2));
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vm.registry.Set(payload.0, (!(a ^ b)).to_be_bytes());
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vm.Walk(3);
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true
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}
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pub fn ShiftLeft(vm: &mut Machine) -> bool {
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let payload = Payload::GetTwoRegisters(vm);
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_ShiftLeft(vm, payload)
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}
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pub fn ShiftLeftAssign(vm: &mut Machine) -> bool {
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let payload = Payload::GetRegister(vm);
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_ShiftLeft(vm, (payload, payload))
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}
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#[inline]
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fn _ShiftLeft(vm: &mut Machine, payload: TwoRegisters) -> bool {
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let a = u32::from_be_bytes(vm.registry.Get(payload.1));
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vm.registry.Set(payload.0, (a << 1).to_be_bytes());
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@ -261,16 +216,7 @@ fn _ShiftLeft(vm: &mut Machine, payload: TwoRegisters) -> bool {
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pub fn ShiftRight(vm: &mut Machine) -> bool {
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let payload = Payload::GetTwoRegisters(vm);
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_ShiftRight(vm, payload)
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}
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pub fn ShiftRightAssign(vm: &mut Machine) -> bool {
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let payload = Payload::GetRegister(vm);
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_ShiftRight(vm, (payload, payload))
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}
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#[inline]
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fn _ShiftRight(vm: &mut Machine, payload: TwoRegisters) -> bool {
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let a = u32::from_be_bytes(vm.registry.Get(payload.1));
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vm.registry.Set(payload.0, (a >> 1).to_be_bytes());
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@ -53,35 +53,21 @@ impl Machine {
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self.mp = self.pc + 1;
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running = match opcode {
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NOP => Nothing(&mut self),
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LDR => LoadRegister(&mut self),
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STR => StoreRegister(&mut self),
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LDA_W => LoadRegister(&mut self),
|
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STA_W => StoreRegister(&mut self),
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INC => IncrementRegister(&mut self),
|
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DEC => DecrementRegister(&mut self),
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ADD => Add(&mut self),
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ADD_ASSIGN => AddAssign(&mut self),
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SUB => Subtract(&mut self),
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SUB_ASSIGN => SubtractAssign(&mut self),
|
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MUL => Multiply(&mut self),
|
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MUL_ASSIGN => MultiplyAssign(&mut self),
|
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DIV => Divide(&mut self),
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DIV_ASSIGN => DivideAssign(&mut self),
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REM => Remainder(&mut self),
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REM_ASSIGN => RemainderAssign(&mut self),
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//NEG
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NEG => Neg(&mut self),
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AND => And(&mut self),
|
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AND_ASSIGN => AndAssign(&mut self),
|
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OR => Or(&mut self),
|
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OR_ASSIGN => OrAssign(&mut self),
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XOR => Xor(&mut self),
|
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XOR_ASSIGN => XorAssign(&mut self),
|
||||
NOT => Not(&mut self),
|
||||
NAND => Nand(&mut self),
|
||||
NOR => Nor(&mut self),
|
||||
XNOR => Xnor(&mut self),
|
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SHL => ShiftLeft(&mut self),
|
||||
SHL_ASSIGN => ShiftLeftAssign(&mut self),
|
||||
SHR => ShiftRight(&mut self),
|
||||
SHR_ASSIGN => ShiftRightAssign(&mut self),
|
||||
EQ => Equals(&mut self),
|
||||
NEQ => NotEquals(&mut self),
|
||||
LT => LessThan(&mut self),
|
||||
LE => LessEquals(&mut self),
|
||||
GT => GreaterThan(&mut self),
|
||||
|
||||
@ -1,293 +1,137 @@
|
||||
/// **0x00** - No operation.
|
||||
///
|
||||
/// ```no_run
|
||||
/// nop
|
||||
/// ```
|
||||
pub const NOP: u8 = 0x00;
|
||||
|
||||
/// **0x01** - Load register from memory.
|
||||
///
|
||||
/// ```no_run
|
||||
/// ldr r1 0050 // r1 = mem[0050]
|
||||
/// ```
|
||||
pub const LDR: u8 = 0x01;
|
||||
|
||||
/// **0x02** - Load register from imediate value.
|
||||
///
|
||||
/// ```no_run
|
||||
/// ldi r1 1 // r1 = 1
|
||||
/// ```
|
||||
pub const LDI: u8 = 0x02;
|
||||
|
||||
/// **0x03** - Store register in memory.
|
||||
///
|
||||
/// ```no_run
|
||||
/// str 0050 r1 // mem[0050] = r1
|
||||
/// ```
|
||||
pub const STR: u8 = 0x03;
|
||||
|
||||
/// **0x04** - Store imediate value in memory.
|
||||
///
|
||||
/// ```no_run
|
||||
/// sti 0050 1 // mem[0050] = 1
|
||||
/// ```
|
||||
pub const STI: u8 = 0x04;
|
||||
|
||||
/// **0x05** - Move register.
|
||||
///
|
||||
/// ```no_run
|
||||
/// mov r1 r2 // r1 = r2
|
||||
/// ```
|
||||
pub const MOV: u8 = 0x05;
|
||||
|
||||
/// **0x06** - Push register value on stack.
|
||||
///
|
||||
/// ```no_run
|
||||
/// push r1 // sp = r1
|
||||
/// ```
|
||||
pub const PUSH: u8 = 0x06;
|
||||
|
||||
/// **0x07** - Pop stack and save in register.
|
||||
///
|
||||
/// ```no_run
|
||||
/// pop r1 // r1 = sp
|
||||
/// ```
|
||||
pub const POP: u8 = 0x07;
|
||||
|
||||
/// **0x08** - Increment register.
|
||||
///
|
||||
/// ```no_run
|
||||
/// inc r1 // r1 += 1
|
||||
/// ```
|
||||
pub const INC: u8 = 0x08;
|
||||
|
||||
/// **0x09** - Decrement register.
|
||||
///
|
||||
/// ```no_run
|
||||
/// dec r1 // r1 -= 1
|
||||
/// ```
|
||||
pub const DEC: u8 = 0x09;
|
||||
|
||||
/// **0x0A** - Jump to address.
|
||||
///
|
||||
/// ```no_run
|
||||
/// jmp 0050
|
||||
/// ```
|
||||
pub const JMP: u8 = 0x0A;
|
||||
|
||||
/// **0x0B** - The addition operator `+`.
|
||||
///
|
||||
/// ```no_run
|
||||
/// add r1 r2 r3 // r1 = r2 + r3
|
||||
/// ```
|
||||
pub const ADD: u8 = 0x0B;
|
||||
|
||||
/// **0x0C** - The addition operator `+`, with carry;
|
||||
///
|
||||
/// ```no_run
|
||||
/// adc r1 r2 r3 r4 // r1 = r2 + r3 + r4
|
||||
/// ```
|
||||
pub const ADC: u8 = 0x0C;
|
||||
|
||||
/// **0x0D** - The addition assignment operator `+=`.
|
||||
///
|
||||
/// ```no_run
|
||||
/// add r1 r2 // r1 += r2
|
||||
/// ```
|
||||
pub const ADD_ASSIGN: u8 = 0x0D;
|
||||
|
||||
/// **0x0E** - The subtraction operator `-`.
|
||||
///
|
||||
/// ```no_run
|
||||
/// sub r1 r2 r3 // r1 = r2 - r3
|
||||
/// ```
|
||||
pub const SUB: u8 = 0x0E;
|
||||
|
||||
//// *0x0F0x06** - The subtraction operator `-`, with carry;
|
||||
///
|
||||
/// ```no_run
|
||||
/// suc r1 r2 r3 r4 // r1 = r2 - r3 + r4
|
||||
/// ```
|
||||
pub const SBC: u8 = 0x0F;
|
||||
|
||||
/// **0x10** - The subtraction assignment operator `-=`.
|
||||
///
|
||||
/// ```no_run
|
||||
/// sub r1 r2 // r1 -= r2
|
||||
/// ```
|
||||
pub const SUB_ASSIGN: u8 = 0x10;
|
||||
|
||||
/// **0x11** - The multiplication operator `*`.
|
||||
///
|
||||
/// ```no_run
|
||||
/// mul r1 r2 r3 // r1 = r2 * r3
|
||||
/// ```
|
||||
pub const MUL: u8 = 0x11;
|
||||
|
||||
/// **0x12** - The multiplication assignment operator `*=`.
|
||||
///
|
||||
/// ```no_run
|
||||
/// mul r1 r2 // r1 *= r2
|
||||
/// ```
|
||||
pub const MUL_ASSIGN: u8 = 0x12;
|
||||
|
||||
/// **0x13** - The division operator `/`.
|
||||
///
|
||||
/// ```no_run
|
||||
/// div r1 r2 r3 // r1 = r2 / r3
|
||||
/// ```
|
||||
pub const DIV: u8 = 0x13;
|
||||
|
||||
/// **0x14** - The division assignment operator `/=`.
|
||||
///
|
||||
/// ```no_run
|
||||
/// div r1 r2 // r1 /= r2
|
||||
/// ```
|
||||
pub const DIV_ASSIGN: u8 = 0x14;
|
||||
|
||||
/// **0x15** - The remainder operator `%`.
|
||||
///
|
||||
/// ```no_run
|
||||
/// rem r1 r2 r3 // r1 = r2 % r3
|
||||
/// ```
|
||||
pub const REM: u8 = 0x15;
|
||||
|
||||
/// **0x16** - The remainder assignment operator `%=`.
|
||||
///
|
||||
/// ```no_run
|
||||
/// rem r1 r2 // r1 %= r2
|
||||
/// ```
|
||||
pub const REM_ASSIGN: u8 = 0x16;
|
||||
|
||||
/// **0x17** - Arithmetic negation `-`.
|
||||
///
|
||||
/// ```no_run
|
||||
/// not r1 r2 // r1 = -r2
|
||||
/// ```
|
||||
pub const NEG: u8 = 0x17;
|
||||
|
||||
/// **0x18** -The bitwise AND operator `&`.
|
||||
///
|
||||
/// ```no_run
|
||||
/// and r1 r2 r3 // r1 = r2 & r3
|
||||
/// ```
|
||||
pub const AND: u8 = 0x18;
|
||||
|
||||
/// **0x19** - The bitwise AND assignment operator `&=`.
|
||||
///
|
||||
/// ```no_run
|
||||
/// and r1 r2 // r1 &= r2
|
||||
/// ```
|
||||
pub const AND_ASSIGN: u8 = 0x19;
|
||||
|
||||
/// **0x1A** - The bitwise OR operator `|`.
|
||||
///
|
||||
/// ```no_run
|
||||
/// or r1 r2 r3 // r1 = r2 | r3
|
||||
/// ```
|
||||
pub const OR: u8 = 0x1A;
|
||||
|
||||
/// **0x1B** - The bitwise OR assignment operator `|=`.
|
||||
///
|
||||
/// ```no_run
|
||||
/// or r1 r2 // r1 |= r2
|
||||
/// ```
|
||||
pub const OR_ASSIGN: u8 = 0x1B;
|
||||
|
||||
/// **0x1C** - The bitwise XOR operator `^`.
|
||||
///
|
||||
/// ```no_run
|
||||
/// xor r1 r2 r3 // r1 = r2 ^ r3
|
||||
/// ```
|
||||
pub const XOR: u8 = 0x1C;
|
||||
|
||||
/// **0x1D** - The bitwise XOR assignment operator `^=`.
|
||||
///
|
||||
/// ```no_run
|
||||
/// xor r1 r2 // r1 ^= r2
|
||||
/// ```
|
||||
pub const XOR_ASSIGN: u8 = 0x1D;
|
||||
|
||||
/// **0x1E** - Logical negation `!`
|
||||
///
|
||||
/// ```no_run
|
||||
/// not r1 r2 // r1 = !r2
|
||||
/// ```
|
||||
pub const NOT: u8 = 0x1E;
|
||||
|
||||
/// **0x1F** - The left shift operator `<<`.
|
||||
///
|
||||
/// ```no_run
|
||||
/// shl r1 r2 // r1 = r2 << 1
|
||||
/// ```
|
||||
pub const SHL: u8 = 0x1F;
|
||||
|
||||
/// **0x20** - The left shift assignment operator `<<=`.
|
||||
///
|
||||
/// ```no_run
|
||||
/// shl r1 // r1 <<= 1
|
||||
/// ```
|
||||
pub const SHL_ASSIGN: u8 = 0x20;
|
||||
|
||||
/// **0x21** - The right shift operator `>>`.
|
||||
///
|
||||
/// ```no_run
|
||||
/// shr r1 r2 // r1 = r2 >> 1
|
||||
/// ```
|
||||
pub const SHR: u8 = 0x21;
|
||||
|
||||
/// **0x22** - The right shift assignment operator `>>=`.
|
||||
///
|
||||
/// ```no_run
|
||||
/// shr r1 // r1 >>= 1
|
||||
/// ```
|
||||
pub const SHR_ASSIGN: u8 = 0x22;
|
||||
|
||||
/// **0x23** - The equality operator `==`.
|
||||
///
|
||||
/// ```no_run
|
||||
/// eq r1 r2 r3 // r1 = r2 == r3
|
||||
/// ```
|
||||
pub const EQ: u8 = 0x23;
|
||||
|
||||
/// **0x24** - The inequality operator `!=`.
|
||||
///
|
||||
/// ```no_run
|
||||
/// neq r1 r2 r3 // r1 = r2 != r3
|
||||
/// ```
|
||||
pub const NEQ: u8 = 0x24;
|
||||
|
||||
/// **0x25** - The less than operator `<`.
|
||||
///
|
||||
/// ```no_run
|
||||
/// lt r1 r2 r3 // r1 = r2 < r3
|
||||
/// ```
|
||||
pub const LT: u8 = 0x25;
|
||||
|
||||
/// **0x26** - The less than or equal to operator `<=`.
|
||||
///
|
||||
/// ```no_run
|
||||
/// le r1 r2 r3 // r1 = r2 <= r3
|
||||
/// ```
|
||||
pub const LE: u8 = 0x26;
|
||||
|
||||
/// **0x27** - The greater than operator `>`.
|
||||
///
|
||||
/// ```no_run
|
||||
/// gt r1 r2 r3 // r1 = r2 > r3
|
||||
/// ```
|
||||
pub const GT: u8 = 0x27;
|
||||
|
||||
/// **0x28** - The greater than or equal to operator `>=`.
|
||||
///
|
||||
/// ```no_run
|
||||
/// ge r1 r2 r3 // r1 = r2 >= r3
|
||||
/// ```
|
||||
pub const GE: u8 = 0x28;
|
||||
|
||||
/// **0xFF** - Halt execution.
|
||||
///
|
||||
/// ```no_run
|
||||
/// hlt
|
||||
/// ```
|
||||
pub const HLT: u8 = 0xFF;
|
||||
pub const NOP: u8 = 0x00; // nop
|
||||
pub const LDR_B: u8 = 0x01; // ldr b r1 r2
|
||||
pub const LDR_H: u8 = 0x02; // ldr h r1 r2
|
||||
pub const LDR_W: u8 = 0x03; // ldr w r1 r2
|
||||
pub const LDR_D: u8 = 0x04; // ldr d r1 r2
|
||||
pub const LDR_Q: u8 = 0x05; // ldr q r1 r2 r3
|
||||
pub const LDA_B: u8 = 0x06; // lda b r1 0x0000000000000000
|
||||
pub const LDA_H: u8 = 0x07; // lda h r1 0x0000000000000000
|
||||
pub const LDA_W: u8 = 0x08; // lda w r1 0x0000000000000000
|
||||
pub const LDA_D: u8 = 0x09; // lda d r1 0x0000000000000000
|
||||
pub const LDA_Q: u8 = 0x0A; // lda q r1 r2 0x0000000000000000
|
||||
pub const LDI_B: u8 = 0x0B; // ldi b r1 0x00
|
||||
pub const LDI_H: u8 = 0x0C; // ldi h r1 0x0000
|
||||
pub const LDI_W: u8 = 0x0D; // ldi w r1 0x00000000
|
||||
pub const LDI_D: u8 = 0x0E; // ldi d r1 0x0000000000000000
|
||||
pub const LDI_Q: u8 = 0x0F; // ldi q r1 r2 0x00000000000000000000000000000000
|
||||
pub const STR_B: u8 = 0x10; // str b r1 r2
|
||||
pub const STR_H: u8 = 0x11; // str h r1 r2
|
||||
pub const STR_W: u8 = 0x12; // str w r1 r2
|
||||
pub const STR_D: u8 = 0x13; // str d r1 r2
|
||||
pub const STR_Q: u8 = 0x14; // str q r1 r2 r3
|
||||
pub const STA_B: u8 = 0x15; // sta b 0x0000000000000000 r1
|
||||
pub const STA_H: u8 = 0x16; // sta h 0x0000000000000000 r1
|
||||
pub const STA_W: u8 = 0x17; // sta w 0x0000000000000000 r1
|
||||
pub const STA_D: u8 = 0x18; // sta d 0x0000000000000000 r1
|
||||
pub const STA_Q: u8 = 0x19; // sta q 0x0000000000000000 r1 r2
|
||||
pub const STI_B: u8 = 0x1A; // sti b
|
||||
pub const STI_H: u8 = 0x1B; // sti h
|
||||
pub const STI_W: u8 = 0x1C; // sti w
|
||||
pub const STI_D: u8 = 0x1D; // sti d
|
||||
pub const STI_Q: u8 = 0x1E; // sti q
|
||||
pub const INC: u8 = 0x1F; // inc r1
|
||||
pub const DEC: u8 = 0x20; // dec r1
|
||||
pub const MOV: u8 = 0x21; // mov r1 r2
|
||||
pub const SWP: u8 = 0x22; // swp r1 r2
|
||||
pub const JMP: u8 = 0x23; // jmp 0x00000000
|
||||
pub const JMZ: u8 = 0x24; // jmz 0x00000000 r1 r2
|
||||
pub const JEQ: u8 = 0x25; // jeq 0x00000000 r1 r2
|
||||
pub const JNE: u8 = 0x26; // jne 0x00000000 r1 r2
|
||||
pub const JLT: u8 = 0x27; // jlt 0x00000000 r1 r2
|
||||
pub const JLE: u8 = 0x28; // jle 0x00000000 r1 r2
|
||||
pub const JGT: u8 = 0x29; // jgt 0x00000000 r1 r2
|
||||
pub const JGE: u8 = 0x2A; // jge 0x00000000 r1 r2
|
||||
pub const CALL: u8 = 0x2B; // call 0x00000000
|
||||
pub const RET: u8 = 0x2C; // ret
|
||||
pub const PUSH_B: u8 = 0x2D; // push b r1
|
||||
pub const PUSH_H: u8 = 0x2E; // push h r1
|
||||
pub const PUSH_W: u8 = 0x2F; // push w r1
|
||||
pub const PUSH_D: u8 = 0x30; // push d r1
|
||||
pub const PUSH_Q: u8 = 0x31; // push q r1 r2
|
||||
pub const PEEK_B: u8 = 0x32; // peek b r1
|
||||
pub const PEEK_H: u8 = 0x33; // peek h r1
|
||||
pub const PEEK_W: u8 = 0x34; // peek w r1
|
||||
pub const PEEK_D: u8 = 0x35; // peek d r1
|
||||
pub const PEEK_Q: u8 = 0x36; // peek q r1 r2
|
||||
pub const POP_B: u8 = 0x37; // pop b r1
|
||||
pub const POP_H: u8 = 0x38; // pop h r1
|
||||
pub const POP_W: u8 = 0x39; // pop w r1
|
||||
pub const POP_D: u8 = 0x3A; // pop d r1
|
||||
pub const POP_Q: u8 = 0x3B; // pop q r1 r2
|
||||
pub const NEG: u8 = 0x3C; // neg r1 r2
|
||||
pub const ADD_U8: u8 = 0x3D; // add u8 r1 r2 r3
|
||||
pub const ADD_U16: u8 = 0x3E; // add u16 r1 r2 r3
|
||||
pub const ADD_U32: u8 = 0x3F; // add u32 r1 r2 r3
|
||||
pub const ADD_U64: u8 = 0x40; // add u64 r1 r2 r3
|
||||
pub const ADD_U128: u8 = 0x41; // add u128 r1 r2 r3 r4 r5 r6
|
||||
pub const ADD_I8: u8 = 0x42; // add i8 r1 r2 r3
|
||||
pub const ADD_I16: u8 = 0x43; // add i16 r1 r2 r3
|
||||
pub const ADD_I32: u8 = 0x44; // add i32 r1 r2 r3
|
||||
pub const ADD_I64: u8 = 0x45; // add i64 r1 r2 r3
|
||||
pub const ADD_I128: u8 = 0x46; // add i128 r1 r2 r3 r4 r5 r6
|
||||
pub const ADD_F32: u8 = 0x47; // add f32 r1 r2 r3
|
||||
pub const ADD_F64: u8 = 0x48; // add f64 r1 r2 r3
|
||||
pub const SUB_U8: u8 = 0x49; // sub u8 r1 r2 r3
|
||||
pub const SUB_U16: u8 = 0x4A; // sub u16 r1 r2 r3
|
||||
pub const SUB_U32: u8 = 0x4B; // sub u32 r1 r2 r3
|
||||
pub const SUB_U64: u8 = 0x4C; // sub u64 r1 r2 r3
|
||||
pub const SUB_U128: u8 = 0x4D; // sub u128 r1 r2 r3 r4 r5 r6
|
||||
pub const SUB_I8: u8 = 0x4E; // sub i8 r1 r2 r3
|
||||
pub const SUB_I16: u8 = 0x4F; // sub i16 r1 r2 r3
|
||||
pub const SUB_I32: u8 = 0x50; // sub i32 r1 r2 r3
|
||||
pub const SUB_I64: u8 = 0x51; // sub i64 r1 r2 r3
|
||||
pub const SUB_I128: u8 = 0x52; // sub i128 r1 r2 r3 r4 r5 r6
|
||||
pub const SUB_F32: u8 = 0x53; // sub f32 r1 r2 r3
|
||||
pub const SUB_F64: u8 = 0x54; // sub f64 r1 r2 r3
|
||||
pub const MUL_U8: u8 = 0x55; // mul u8 r1 r2 r3
|
||||
pub const MUL_U16: u8 = 0x56; // mul u16 r1 r2 r3
|
||||
pub const MUL_U32: u8 = 0x57; // mul u32 r1 r2 r3
|
||||
pub const MUL_U64: u8 = 0x58; // mul u64 r1 r2 r3
|
||||
pub const MUL_U128: u8 = 0x59; // mul u128 r1 r2 r3 r4 r5 r6
|
||||
pub const MUL_I8: u8 = 0x5A; // mul i8 r1 r2 r3
|
||||
pub const MUL_I16: u8 = 0x5B; // mul i16 r1 r2 r3
|
||||
pub const MUL_I32: u8 = 0x5C; // mul i32 r1 r2 r3
|
||||
pub const MUL_I64: u8 = 0x5D; // mul i64 r1 r2 r3
|
||||
pub const MUL_I128: u8 = 0x5E; // mul i128 r1 r2 r3 r4 r5 r6
|
||||
pub const MUL_F32: u8 = 0x5F; // mul f32 r1 r2 r3
|
||||
pub const MUL_F64: u8 = 0x60; // mul f64 r1 r2 r3
|
||||
pub const DIV_U8: u8 = 0x61; // div u8 r1 r2 r3
|
||||
pub const DIV_U16: u8 = 0x62; // div u16 r1 r2 r3
|
||||
pub const DIV_U32: u8 = 0x63; // div u32 r1 r2 r3
|
||||
pub const DIV_U64: u8 = 0x64; // div u64 r1 r2 r3
|
||||
pub const DIV_U128: u8 = 0x65; // div u128 r1 r2 r3 r4 r5 r6
|
||||
pub const DIV_I8: u8 = 0x66; // div i8 r1 r2 r3
|
||||
pub const DIV_I16: u8 = 0x67; // div i16 r1 r2 r3
|
||||
pub const DIV_I32: u8 = 0x68; // div i32 r1 r2 r3
|
||||
pub const DIV_I64: u8 = 0x69; // div i64 r1 r2 r3
|
||||
pub const DIV_I128: u8 = 0x6A; // div i128 r1 r2 r3 r4 r5 r6
|
||||
pub const DIV_F32: u8 = 0x6B; // div f32 r1 r2 r3
|
||||
pub const DIV_F64: u8 = 0x6C; // div f64 r1 r2 r3
|
||||
pub const REM_U8: u8 = 0x6D; // rem u8 r1 r2 r3
|
||||
pub const REM_U16: u8 = 0x6E; // rem u16 r1 r2 r3
|
||||
pub const REM_U32: u8 = 0x6F; // rem u32 r1 r2 r3
|
||||
pub const REM_U64: u8 = 0x70; // rem u64 r1 r2 r3
|
||||
pub const REM_U128: u8 = 0x71; // rem u128 r1 r2 r3 r4 r5 r6
|
||||
pub const REM_I8: u8 = 0x72; // rem i8 r1 r2 r3
|
||||
pub const REM_I16: u8 = 0x73; // rem i16 r1 r2 r3
|
||||
pub const REM_I32: u8 = 0x74; // rem i32 r1 r2 r3
|
||||
pub const REM_I64: u8 = 0x75; // rem i64 r1 r2 r3
|
||||
pub const REM_I128: u8 = 0x76; // rem i128 r1 r2 r3 r4 r5 r6
|
||||
pub const REM_F32: u8 = 0x77; // rem f32 r1 r2 r3
|
||||
pub const REM_F64: u8 = 0x78; // rem f64 r1 r2 r3
|
||||
pub const AND: u8 = 0x79; // and r1 r2 r3
|
||||
pub const OR: u8 = 0x7A; // or r1 r2 r3
|
||||
pub const XOR: u8 = 0x7B; // xor r1 r2 r3
|
||||
pub const NOT: u8 = 0x7C; // not r1 r2
|
||||
pub const NAND: u8 = 0x7D; // nand r1 r2 r3
|
||||
pub const NOR: u8 = 0x7E; // nor r1 r2 r3
|
||||
pub const XNOR: u8 = 0x7F; // xnor r1 r2 r3
|
||||
pub const SHL: u8 = 0x80; // shl r1 r2
|
||||
pub const SHR: u8 = 0x81; // shr r1 r2
|
||||
pub const EQ: u8 = 0x82; // eq r1 r2 r3
|
||||
pub const NE: u8 = 0x83; // ne r1 r2 r3
|
||||
pub const LT: u8 = 0x84; // lt r1 r2 r3
|
||||
pub const LE: u8 = 0x85; // le r1 r2 r3
|
||||
pub const GT: u8 = 0x86; // gt r1 r2 r3
|
||||
pub const GE: u8 = 0x87; // ge r1 r2 r3
|
||||
pub const HLT: u8 = 0xFF; // hlt
|
||||
|
||||
@ -1,13 +1,28 @@
|
||||
use crate::Machine;
|
||||
use crate::Types::{Byte, Word};
|
||||
|
||||
pub type Register = Byte;
|
||||
pub type RegisterAddress = (Byte, Word);
|
||||
pub type AddressRegister = (Word, Byte);
|
||||
pub type Register = Byte;
|
||||
pub type TwoRegisters = (Byte, Byte);
|
||||
pub type ThreeRegisters = (Byte, Byte, Byte);
|
||||
pub type FourRegisters = (Byte, Byte, Byte, Byte);
|
||||
|
||||
pub enum PayloadType {
|
||||
Nothing,
|
||||
Register,
|
||||
RegisterAddress,
|
||||
AddressRegister,
|
||||
TwoRegisters,
|
||||
ThreeRegisters,
|
||||
FourRegisters,
|
||||
}
|
||||
|
||||
#[inline]
|
||||
pub fn GetRegister(vm: &mut Machine) -> Register {
|
||||
vm.ReadByte(None)
|
||||
}
|
||||
|
||||
#[inline]
|
||||
pub fn GetRegisterAddress(vm: &mut Machine) -> RegisterAddress {
|
||||
(vm.ReadByte(None), vm.ReadWord(None))
|
||||
@ -18,11 +33,6 @@ pub fn GetAddressRegister(vm: &mut Machine) -> AddressRegister {
|
||||
(vm.ReadWord(None), vm.ReadByte(None))
|
||||
}
|
||||
|
||||
#[inline]
|
||||
pub fn GetRegister(vm: &mut Machine) -> Register {
|
||||
vm.ReadByte(None)
|
||||
}
|
||||
|
||||
#[inline]
|
||||
pub fn GetTwoRegisters(vm: &mut Machine) -> TwoRegisters {
|
||||
(vm.ReadByte(None), vm.ReadByte(None))
|
||||
|
||||
@ -1,3 +1,5 @@
|
||||
pub type Byte = u8;
|
||||
pub type Half = [Byte; 2];
|
||||
pub type Word = [Byte; 4];
|
||||
pub type DWord = [Byte; 8];
|
||||
pub type QWord = [Byte; 16];
|
||||
|
||||
@ -7,10 +7,6 @@ pub mod Operations;
|
||||
pub mod Payload;
|
||||
pub mod Types;
|
||||
|
||||
#[path = "Assembly.rs"]
|
||||
mod _Assembly;
|
||||
pub use self::_Assembly::*;
|
||||
|
||||
#[path = "Frame.rs"]
|
||||
mod _Frame;
|
||||
pub use self::_Frame::*;
|
||||
|
||||
Reference in New Issue
Block a user